Beyer, S. and Jacobi, C. and Kröning, D. and Leinenbach, D. and Paul, W.J. |
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Putting it all together - Formal Verification of the VAMP. | In STTT Journal, Special Issue on Recent Advances in Hardware Verification, | Springer, 2006. | | Beyer, Sven |
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Putting it all together - Formal Verification of the VAMP. | | Dissertation, Saarland University, Saarbrücken, 2005. | | Ayewah, N. and Beyer, S. and Kikkeri, N. and Seidel, P.-M. |
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Challenges in the Formal Verification of Complete State-of-the-Art Processors. | In International Conference on Computer Design, | San Jose | 2005. | | Beyer, S. and Böhm, P. and Gerke, M. and Hillebrand, M. and In der Rieden, T. and Knapp, S. and Leinenbach, D. and Paul, W.J. |
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Towards the Formal Verification of Lower System Layers in Automotive Systems. | In 23nd IEEE International Conference on Computer Design: VLSI in Computers and Processors (ICCD 2005), 2-5 October 2005, San Jose, CA, USA, Proceedings, | pages 317-324, IEEE, 2005. | ISBN 0-7695-2451-6 | | Beyer, S. and Jacobi, C. and Kröning, D. and Leinenbach, D. and Paul, W.J. |
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Instantiating uninterpreted functional units and memory system: functional verification of the VAMP. | In Geist, D. and Tronci, E., editors, CHARME 2003, | volume 2860 of LNCS, pages 51-65, Springer, 2003. | | Berg, C. and Beyer, S. and Jacobi, C. and Kröning, D. and Leinenbach, D. |
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Formal Verification of the VAMP Microprocessor (Project Status). | In Charatonik, Witold and Ganzinger, Harald, editors, Symposium on the Effectiveness of Logic in Computer Science (ELICS02), | pages 31-36, Max-Planck-Institut für Informatik, 2002. | | Beyer, S. and Jacobi, C. and Kroening, D. and Leinenbach, D. |
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Correct Hardware by Synthesis from PVS. | 2002. | unpublished, available at http://www-wjp.cs.uni-sb.de/publikationen/BJKL02.pdf | | Beyer, Sven |
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Entwurf einer PCI-Karte als Schnittstelle zwischen SB-PRAM und PC. | | Diplomarbeit, Universität des Saarlandes, 2000. | |
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